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Gupta, Isha
- Design and Performance Analysis of RAM_WR_ Control Module using Xilinx ISE 14.2
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Affiliations
1 Department of Computer Science & Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
2 Department of Electronics & Communication Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
3 Techno planet labs Pvt Ltd, Faridabad - 121003, Haryana, IN
1 Department of Computer Science & Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
2 Department of Electronics & Communication Engineering, Chitkara University Institute of Engineering & Technology, Chitkara University, IN
3 Techno planet labs Pvt Ltd, Faridabad - 121003, Haryana, IN
Source
Indian Journal of Science and Technology, Vol 9, No 46 (2016), Pagination:Abstract
In the following work RAM_Write_Control module has been designed and its performance has been analyzed in terms of utilization of power and energy in order to make it energy and power efficient. The main idea behind this unit is to control the data write operation to the core which is used for saving the raw data in impedance measurement module of Electrical Impedance Tomography (EIT) system, KHU Mark 2.5. The performance of the unit is analyzed using 14.2 version of Xilinx software at Virtex-5 FPGA chip. The total power consumption of 3 logic families HSTL (High Speed Transceiver Logic), LVCMOS (Low Voltage Metal Oxide Semiconductor) and LVTTL (Low Voltage Transistor-Transistor Logic) at different I/O Standards have been compared in order to excrete out the most energy efficient logic family. Frequency scaling technique has also been applied by varying the frequencies at a scale of 100 Hz i.e., from 400MHz to 500 MHz to 600 MHz to 700 MHz in a way to find out the most power efficient frequency. It has been observed minimum power consumption occurs in case if we use LVCOMS15 I/O standard of LVCMOS logic family in comparison to other IO standards of other 2 logic families. And this maximum power savage occurs at a lowest frequency of 400 MHz.Keywords
Energy Efficiency, EIT RAM, FPGA, System, WRITE CONTROL, Xilinx.- Power Efficient Telugu Unicode Reader Design on FPGA
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Authors
Affiliations
1 Department of Electronics and Communication Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University Chandigarh – 140401, Punjab, IN
2 Department of Computer Science Engineering, Chitkara University Institute of Engineering and Technology. Chitkara University Chandigarh – 140401, Punjab, IN
3 Kurukshetra University, Kurukshetra – 136119, Haryana, IN
1 Department of Electronics and Communication Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University Chandigarh – 140401, Punjab, IN
2 Department of Computer Science Engineering, Chitkara University Institute of Engineering and Technology. Chitkara University Chandigarh – 140401, Punjab, IN
3 Kurukshetra University, Kurukshetra – 136119, Haryana, IN
Source
Indian Journal of Science and Technology, Vol 10, No 29 (2017), Pagination:Abstract
An energy efficient Telugu Unicode Reader has been designed in the following research paper. Telugu Unicode reader design has range of characters from 0C00-0C7F. It is most spoken script for Telugu people. This script is also used for writing Sanskrit texts. Telugu script shares many similarities with the Kannada script and is derived from old Kannada script. In the following paper Telugu Unicode reader code has been implemented on Xilinx ISE design suit 14.2. and is synthesized on Virtex-6 and Artix-7 FPGA technology by applying frequency scaling technique. This Unicode reader design is synthesized on different frequencies of 1THz, 100GHz, 10GHz, 10GHz, 1GHz, 100MHz, 10MHz, 1MHz. This Telugu Unicode reader can detect vowels, consonants, digits etc of Telugu language.Keywords
Energy Efficient Hardware Design, FPGA technology, Frequency Scaling, Telugu Unicode Reader, Xilinx- Electric Vehicle for the Movement of Disabled People
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Authors
Affiliations
1 Department of Electrical & Electronics Engg, M.S.Ramamiah Institute of Technology, Bangalore, India., IN
2 Department of Electrical & Electronics Engg, Nitte Meenakshi Institute of Technology, Bangalore, India., IN
1 Department of Electrical & Electronics Engg, M.S.Ramamiah Institute of Technology, Bangalore, India., IN
2 Department of Electrical & Electronics Engg, Nitte Meenakshi Institute of Technology, Bangalore, India., IN
Source
Journal of Mines, Metals and Fuels, Vol 71, No 1 (2023), Pagination: 11-18Abstract
Electric vehicle for the disabled is an independent mono seated vehicle that can assist to promote mobility and enhance quality of life of people, especially those who have difficulties in walking and are unable to commute to nearby places. To ensure effective mobility, users need a vehicle which fits their wheelchair correctly and meets their specific needs. In this vehicle, the frame is completely modified and incorporates a ramp at the rear end with thin iron rods attached, in the form of tracks which helps the user to get inside the vehicle using wheelchair. It also has a controller which controls the overall electrical operation of the vehicle. The speed variation is done using a hand throttle that is connected to BLDC motor via controller. The vehicle is designed for 200kg weight, 25 kmph maximum speed with length and width of the vehicle 1.5m and 0.7m respectively. A low, medium and high-speed switch is used to set the desired speed accordingly. The vehicle also has a battery indicator connected to controller so that the user is aware of the battery consumption.Keywords
Mono Car, Movement Disable, Electric Vehicle, BLDC Motor.References
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